Communication
This commit is contained in:
parent
20481afb70
commit
6905610342
@ -12,14 +12,18 @@ pico_sdk_init()
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add_executable(Mon_Projet
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main.c
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i2c_maitre.c
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i2c_slave.c
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communication.c
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)
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target_include_directories(Mon_Projet PRIVATE Mon_Projet_ULD_API/inc/)
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target_link_libraries(Mon_Projet
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hardware_i2c
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hardware_uart
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hardware_adc
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hardware_pwm
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hardware_uart
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pico_stdlib
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pico_multicore
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)
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107
communication.c
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107
communication.c
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@ -0,0 +1,107 @@
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/*****
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*
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* Le principe est que la télécommande soit l'esclave I2C
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* Pour envoyer un message, on charge le message à l'adresse 0 de la "mémoire" pour l'i2c
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*
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* Pour lire le message, le robot interroge la télécommande, et demande le contenu à partir de l'adresse 0 de la mémoire.
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* Ainsi, en cas d'échec de la communication, le robot détectera une manette débranchée.
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* Par défaut, la fonction lit 255 caractères.
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*
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* Copyright (c) 2024 - Club robotique de Riom
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "i2c_fifo.h"
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#include "i2c_slave.h"
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#include "i2c_maitre.h"
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#include "string.h"
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/// DEBUT DE LA CONFIGURATION de L'I2C
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#define I2C0_SDA_PIN 16
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#define I2C0_SCL_PIN 17
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#define I2C_SLAVE_ADDRESS 0x17
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static const uint I2C_SLAVE_SDA_PIN = I2C0_SDA_PIN;
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static const uint I2C_SLAVE_SCL_PIN = I2C0_SCL_PIN;
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// The slave implements a 256 byte memory. To write a series of bytes, the master first
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// writes the memory address, followed by the data. The address is automatically incremented
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// for each byte transferred, looping back to 0 upon reaching the end. Reading is done
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// sequentially from the current memory address.
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static struct
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{
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uint8_t mem[256];
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uint8_t mem_address;
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bool mem_address_written;
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} context;
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// Our handler is called from the I2C ISR, so it must complete quickly. Blocking calls /
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// printing to stdio may interfere with interrupt handling.
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static void i2c_slave_handler(i2c_inst_t *i2c, i2c_slave_event_t event) {
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switch (event) {
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case I2C_SLAVE_RECEIVE: // master has written some data
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if (!context.mem_address_written) {
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// writes always start with the memory address
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context.mem_address = i2c_read_byte(i2c);
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context.mem_address_written = true;
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} else {
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// save into memory
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context.mem[context.mem_address] = i2c_read_byte(i2c);
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context.mem_address++;
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}
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break;
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case I2C_SLAVE_REQUEST: // master is requesting data
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// load from memory
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i2c_write_byte(i2c, context.mem[context.mem_address]);
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context.mem_address++;
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break;
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case I2C_SLAVE_FINISH: // master has signalled Stop / Restart
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context.mem_address_written = false;
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break;
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default:
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break;
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}
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}
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void i2c_set_slave_mode_perso(i2c_inst_t *i2c, uint8_t addr) {
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i2c->hw->enable = 0;
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//while( !(i2c->hw->enable_status & 0x1) );
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i2c->hw->sar = addr;
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i2c->hw->con = 0;
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i2c->hw->enable = 1;
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}
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static void setup_slave() {
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gpio_init(I2C_SLAVE_SDA_PIN);
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gpio_set_function(I2C_SLAVE_SDA_PIN, GPIO_FUNC_I2C);
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gpio_pull_up(I2C_SLAVE_SDA_PIN);
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gpio_init(I2C_SLAVE_SCL_PIN);
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gpio_set_function(I2C_SLAVE_SCL_PIN, GPIO_FUNC_I2C);
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gpio_pull_up(I2C_SLAVE_SCL_PIN);
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i2c_slave_init(i2c0, I2C_SLAVE_ADDRESS, &i2c_slave_handler);
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}
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/// FIN DE LA CONFIGURATION de L'I2C
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void communication_init(void){
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setup_slave();
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i2c_maitre_init();
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}
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void communication_envoyer_message(unsigned char * message, unsigned int message_length){
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memcpy(context.mem, message, message_length);
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}
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int communication_lire_message(unsigned char * message){
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i2c_lire_registre(I2C_SLAVE_ADDRESS, 0, message, 255);
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}
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5
communication.h
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5
communication.h
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@ -0,0 +1,5 @@
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#include "i2c_maitre.h"
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void communication_init(void);
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void communication_envoyer_message(unsigned char * message, unsigned int message_length);
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enum i2c_resultat_t communication_lire_message(unsigned char * message);
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53
i2c_fifo.h
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53
i2c_fifo.h
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@ -0,0 +1,53 @@
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/*
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* Copyright (c) 2021 Valentin Milea <valentin.milea@gmail.com>
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef _I2C_FIFO_H_
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#define _I2C_FIFO_H_
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#include <hardware/i2c.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \file i2c_fifo.h
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*
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* \brief I2C non-blocking r/w.
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*/
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/**
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* \brief Pop a byte from I2C Rx FIFO.
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*
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* This function is non-blocking and assumes the Rx FIFO isn't empty.
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*
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* \param i2c I2C instance.
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* \return uint8_t Byte value.
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*/
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static inline uint8_t i2c_read_byte(i2c_inst_t *i2c) {
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i2c_hw_t *hw = i2c_get_hw(i2c);
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assert(hw->status & I2C_IC_STATUS_RFNE_BITS); // Rx FIFO must not be empty
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return (uint8_t)hw->data_cmd;
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}
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/**
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* \brief Push a byte into I2C Tx FIFO.
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*
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* This function is non-blocking and assumes the Tx FIFO isn't full.
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*
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* \param i2c I2C instance.
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* \param value Byte value.
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*/
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static inline void i2c_write_byte(i2c_inst_t *i2c, uint8_t value) {
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i2c_hw_t *hw = i2c_get_hw(i2c);
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assert(hw->status & I2C_IC_STATUS_TFNF_BITS); // Tx FIFO must not be full
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hw->data_cmd = value;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif // _I2C_FIFO_H_
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281
i2c_maitre.c
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281
i2c_maitre.c
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#include "i2c_maitre.h"
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#include "hardware/gpio.h"
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#include "hardware/i2c.h"
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#include "pico/stdlib.h"
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#include <stdio.h>
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#define I2C1_SDA_PIN 18
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#define I2C1_SCL_PIN 19
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#define I2C_NB_MAX_TAMPON 20
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enum i2c_statu_t{
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I2C_STATU_LIBRE,
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I2C_STATU_OCCUPE
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} i2c_statu_i2c1;
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uint16_t I2C_tampon_envoi[I2C_NB_MAX_TAMPON];
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uint8_t I2C_tampon_reception[I2C_NB_MAX_TAMPON];
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uint16_t I2C_nb_a_envoyer, I2C_nb_a_recevoir;
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uint8_t adresse_7_bits;
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uint32_t i2c_error_code; // value of i2c->hw->tx_abrt_source if anything wrong happen, 0 if everything was fine.
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enum transaction_statu_t{
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TRANSACTION_EN_COURS,
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TRANSACTION_TERMINEE
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} statu_emission, statu_reception;
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void i2d_set_adresse_esclave(uint8_t _adresse_7bits);
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void i2c_charger_tampon_envoi(uint8_t* emission, uint16_t nb_envoi, uint16_t nb_reception);
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enum i2c_resultat_t i2c_transmission(uint8_t _adresse_7bits, uint8_t* emission, uint16_t nb_envoi, uint16_t nb_reception);
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void i2c_maitre_init(void){
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//stdio_init_all();
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i2c_init(i2c1, 100 * 1000);
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printf("Initialisation des broches\n");
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for(int i=0; i++; i<=28){
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if(gpio_get_function(i) == GPIO_FUNC_I2C){
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printf("Borche I2C : %d\n", i);
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gpio_set_function(i, GPIO_FUNC_NULL);
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}
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}
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printf("%d et %d en I2C\n", I2C1_SDA_PIN, I2C1_SCL_PIN);
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gpio_set_function(I2C1_SDA_PIN, GPIO_FUNC_I2C);
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gpio_set_function(I2C1_SCL_PIN, GPIO_FUNC_I2C);
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gpio_pull_up(I2C1_SDA_PIN);
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gpio_pull_up(I2C1_SCL_PIN);
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i2c_statu_i2c1 = I2C_STATU_LIBRE;
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}
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/// @brief Fonction à appeler régulièrement ou en interruption.
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/// @param i2c
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void i2c_gestion(i2c_inst_t *i2c){
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// on veut gérer l'i2c avec cette fonction.
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// 2 cas :
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// - Soit écriture simple (plusieurs octets (W))
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// - Soit écriture + lecture (Adresse (W), registre (W), données (R))
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// Pour écrire 1 octet, i2c->hw->data_cmd = xxx, (avec CMD:8 à 0, )
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// Pour lire 1 octet, i2c->hw->data_cmd = xxx (avec CMD:8 à 1)
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// Il faut mettre CMD:9 à 1 pour le dernier octet.
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// Envoi des données (ou des demandes de lecture)
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static uint16_t index_envoi=0, index_reception=0;
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// Acquitement des erreurs, pas 100% fonctionnel ! TODO !
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if(i2c->hw->tx_abrt_source !=0){
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// Seule solution trouvée pour réinitialiser l'I2C.
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char a;
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i2c_read_blocking(i2c, adresse_7_bits, &a, 1, false);
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I2C_nb_a_envoyer = 0;
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index_reception = 0;
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I2C_nb_a_recevoir = 0;
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statu_emission = TRANSACTION_TERMINEE;
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statu_reception = TRANSACTION_TERMINEE;
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i2c_statu_i2c1 = I2C_STATU_LIBRE;
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}
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while( (index_envoi < I2C_nb_a_envoyer) && (i2c_get_write_available(i2c)) ){
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bool restart = false;
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bool last = false;
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if (index_envoi == 0){
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// Début de l'envoi, assurons nous d'avoir la bonne adresse de l'esclave
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i2c->hw->enable = 0;
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i2c->hw->tar = adresse_7_bits;
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i2c->hw->enable = 1;
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}else{
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// Passage de l'écriture à la lecture, on envoie un bit de restart.
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if( !(I2C_tampon_envoi[index_envoi-1] & I2C_IC_DATA_CMD_CMD_BITS) &&
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(I2C_tampon_envoi[index_envoi] & I2C_IC_DATA_CMD_CMD_BITS)){
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restart = true;
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}
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}
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if(index_envoi + 1 == I2C_nb_a_envoyer){
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// Fin de la trame, nous devons envoyer un bit de stop.
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last = true;
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}
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i2c->hw->data_cmd =
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I2C_tampon_envoi[index_envoi] |
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bool_to_bit(restart) << I2C_IC_DATA_CMD_RESTART_LSB |
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bool_to_bit(last) << I2C_IC_DATA_CMD_STOP_LSB;
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if(last){
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statu_emission = TRANSACTION_TERMINEE;
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index_envoi = 0;
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I2C_nb_a_envoyer = 0;
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//printf("I2C emission terminee\n");
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}else{
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index_envoi++;
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}
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}
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// Réception des données - Lecture des données présentes dans le tampon
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while( (index_reception < I2C_nb_a_recevoir) && (i2c_get_read_available(i2c)) ){
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I2C_tampon_reception[index_reception] = (uint8_t) i2c->hw->data_cmd;
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index_reception++;
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}
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if(index_reception == I2C_nb_a_recevoir){
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statu_reception = TRANSACTION_TERMINEE;
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index_reception = 0;
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I2C_nb_a_recevoir = 0;
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}
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if(statu_reception == TRANSACTION_TERMINEE && statu_emission == TRANSACTION_TERMINEE){
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i2c_statu_i2c1 = I2C_STATU_LIBRE;
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}
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}
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/// @brief Charge le tampon d'émission pour pré-mâcher le travail à la fonction i2c_gestion
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/// @param emission
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/// @param nb_envoi
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/// @param nb_reception
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void i2c_charger_tampon_envoi(uint8_t* emission, uint16_t nb_envoi, uint16_t nb_reception){
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// Données à envoyer
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for(unsigned int index=0; index<nb_envoi; index++){
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I2C_tampon_envoi[index] = (uint16_t) emission[index];
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}
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// Données à lire
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for(unsigned int index=0; index<nb_reception; index++){
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I2C_tampon_envoi[nb_envoi + index] = (uint16_t) 0x0100;
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}
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}
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/// @brief Stock l'adresse de l'esclave avec lequel communiquer
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/// @param _adresse_7bits
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void i2d_set_adresse_esclave(uint8_t _adresse_7bits){
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adresse_7_bits =_adresse_7bits;
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}
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/// @brief Initialise la transmission I2, sur l'i2c1. Une transmission se compose de 2 trames I2C, une pour écrire (Adresse + données), une pour lire
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/// Si nb_reception = 0, alors la trame pour lire ne sera pas envoyée.
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/// @param emission : données à envoyer
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/// @param nb_envoi : nombre de données à envoyer
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/// @param nb_reception : nombre de données à recevoir
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/// @return I2C_EN_COURS, I2C_SUCCES ou I2C_ECHEC
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enum i2c_resultat_t i2c_transmission(uint8_t _adresse_7bits, uint8_t* emission, uint16_t nb_envoi, uint16_t nb_reception){
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static enum m_statu_t{
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I2C_STATU_INIT,
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I2C_STATU_EN_COURS,
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}m_statu = I2C_STATU_INIT;
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switch(m_statu){
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case I2C_STATU_INIT:
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// I2C libre ?
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if(i2c_statu_i2c1 == I2C_STATU_OCCUPE){
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return I2C_EN_COURS;
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}
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// Alors il est à nous !
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i2c_statu_i2c1 = I2C_STATU_OCCUPE;
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statu_emission = TRANSACTION_EN_COURS;
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statu_reception = TRANSACTION_EN_COURS;
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i2c_error_code = 0;
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i2d_set_adresse_esclave(_adresse_7bits);
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i2c_charger_tampon_envoi(emission, nb_envoi, nb_reception);
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// Nous devons envoyer aussi une commande pour chaque octet à recevoir.
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I2C_nb_a_envoyer = nb_envoi + nb_reception;
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I2C_nb_a_recevoir = nb_reception;
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// On appelle la fonction gestion pour gagner du temps.
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i2c_gestion(i2c1);
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m_statu = I2C_STATU_EN_COURS;
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break;
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case I2C_STATU_EN_COURS:
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if(i2c_statu_i2c1 == I2C_STATU_LIBRE){
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m_statu = I2C_STATU_INIT;
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if(i2c_error_code){
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return I2C_ECHEC;
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}else{
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return I2C_SUCCES;
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}
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}
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break;
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}
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return I2C_EN_COURS;
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}
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/// @brief Lit le registre d'un composant se comportant comme une EPROM I2C.
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/// @return I2C_SUCCES, I2C_EN_COURS ou I2C_ECHEC
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enum i2c_resultat_t i2c_lire_registre_nb(uint8_t adresse_7_bits, uint8_t registre, uint8_t * reception, uint8_t len){
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uint8_t emission[1];
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emission[0] = registre;
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enum i2c_resultat_t i2c_resultat;
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i2c_resultat = i2c_transmission(adresse_7_bits, emission, 1, len);
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if(i2c_resultat == I2C_SUCCES){
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for(uint32_t i = 0; i < len; i++){
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reception[i] = I2C_tampon_reception[i];
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}
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return I2C_SUCCES;
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}else if(i2c_resultat == I2C_ECHEC){
|
||||
return I2C_ECHEC;
|
||||
}
|
||||
return I2C_EN_COURS;
|
||||
}
|
||||
|
||||
/// @brief Initialise une transaction I2C.
|
||||
/// Renvoie I2C_SUCCES si l'intégralité du message est chargé en envoi,
|
||||
/// Renvoie I2C_EN_COURS si la fonction doit encore être appelée pour finir d'envoyer le message
|
||||
/// Renvoie I2C_ECHEC en cas d'erreur I2C.
|
||||
enum i2c_resultat_t i2c_ecrire_registre_nb(uint8_t adresse_7_bits, uint8_t registre, uint8_t * _emission, uint8_t len){
|
||||
uint8_t emission[I2C_NB_MAX_TAMPON];
|
||||
emission[0] = registre;
|
||||
for(uint32_t i = 0; i < len; i++){
|
||||
emission[i+1] = _emission[i];
|
||||
}
|
||||
enum i2c_resultat_t i2c_resultat;
|
||||
return i2c_transmission(adresse_7_bits, emission, 1 + len, 0);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/// @brief Pour l'instant bloquant, mais devrait passer en non bloquant bientôt => Non, voir i2c_lire_registre_nb
|
||||
/// @param adresse_7_bits
|
||||
/// @param
|
||||
/// @return I2C_SUCCES (1) ou I2C_ECHEC (2)
|
||||
int i2c_lire_registre(char adresse_7_bits, char registre, unsigned char * reception, char len){
|
||||
int statu;
|
||||
char emission[1];
|
||||
|
||||
emission[0] = registre;
|
||||
statu = i2c_write_blocking (i2c1, adresse_7_bits, emission, 1, 0);
|
||||
if(statu == PICO_ERROR_GENERIC){
|
||||
printf("I2C - Envoi registre Echec\n");
|
||||
return I2C_ECHEC;
|
||||
}
|
||||
|
||||
statu = i2c_read_blocking (i2c1, adresse_7_bits, reception, len, 0);
|
||||
if(statu == PICO_ERROR_GENERIC){
|
||||
printf("I2C - Lecture registre Echec\n");
|
||||
return I2C_ECHEC;
|
||||
}
|
||||
|
||||
return I2C_SUCCES;
|
||||
}
|
||||
|
||||
int i2c_ecrire_registre(char adresse_7_bits, char registre, char valeur_registre){
|
||||
int statu;
|
||||
char emission[2];
|
||||
|
||||
emission[0] = registre;
|
||||
emission[1] = valeur_registre;
|
||||
statu = i2c_write_blocking (i2c1, adresse_7_bits, emission, 2, 0);
|
||||
if(statu == PICO_ERROR_GENERIC){
|
||||
printf("Erreur ecrire registre\n");
|
||||
return I2C_ECHEC;
|
||||
}
|
||||
|
||||
printf("i2c Registre %x, valeur %x\n", registre, valeur_registre);
|
||||
|
||||
return I2C_SUCCES;
|
||||
}
|
15
i2c_maitre.h
Normal file
15
i2c_maitre.h
Normal file
@ -0,0 +1,15 @@
|
||||
#include "pico/stdlib.h"
|
||||
#include "hardware/i2c.h"
|
||||
|
||||
enum i2c_resultat_t {
|
||||
I2C_EN_COURS,
|
||||
I2C_SUCCES,
|
||||
I2C_ECHEC
|
||||
};
|
||||
|
||||
void i2c_maitre_init(void);
|
||||
void i2c_gestion(i2c_inst_t *i2c);
|
||||
enum i2c_resultat_t i2c_lire_registre_nb(uint8_t adresse_7_bits, uint8_t registre, uint8_t * reception, uint8_t len);
|
||||
enum i2c_resultat_t i2c_ecrire_registre_nb(uint8_t adresse_7_bits, uint8_t registre, uint8_t * _emission, uint8_t len);
|
||||
int i2c_ecrire_registre(char adresse_7_bits, char registre, char valeur_registre);
|
||||
int i2c_lire_registre(char adresse_7_bits, char registre, unsigned char * reception, char len);
|
108
i2c_slave.c
Normal file
108
i2c_slave.c
Normal file
@ -0,0 +1,108 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Valentin Milea <valentin.milea@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
#include "i2c_slave.h"
|
||||
#include "hardware/irq.h"
|
||||
|
||||
typedef struct i2c_slave_t
|
||||
{
|
||||
i2c_inst_t *i2c;
|
||||
i2c_slave_handler_t handler;
|
||||
bool transfer_in_progress;
|
||||
} i2c_slave_t;
|
||||
|
||||
static i2c_slave_t i2c_slaves[2];
|
||||
|
||||
static inline void finish_transfer(i2c_slave_t *slave) {
|
||||
if (slave->transfer_in_progress) {
|
||||
slave->handler(slave->i2c, I2C_SLAVE_FINISH);
|
||||
slave->transfer_in_progress = false;
|
||||
}
|
||||
}
|
||||
|
||||
static void __not_in_flash_func(i2c_slave_irq_handler)(i2c_slave_t *slave) {
|
||||
i2c_inst_t *i2c = slave->i2c;
|
||||
i2c_hw_t *hw = i2c_get_hw(i2c);
|
||||
|
||||
uint32_t intr_stat = hw->intr_stat;
|
||||
if (intr_stat == 0) {
|
||||
return;
|
||||
}
|
||||
if (intr_stat & I2C_IC_INTR_STAT_R_TX_ABRT_BITS) {
|
||||
hw->clr_tx_abrt;
|
||||
finish_transfer(slave);
|
||||
}
|
||||
if (intr_stat & I2C_IC_INTR_STAT_R_START_DET_BITS) {
|
||||
hw->clr_start_det;
|
||||
finish_transfer(slave);
|
||||
}
|
||||
if (intr_stat & I2C_IC_INTR_STAT_R_STOP_DET_BITS) {
|
||||
hw->clr_stop_det;
|
||||
finish_transfer(slave);
|
||||
}
|
||||
if (intr_stat & I2C_IC_INTR_STAT_R_RX_FULL_BITS) {
|
||||
slave->transfer_in_progress = true;
|
||||
slave->handler(i2c, I2C_SLAVE_RECEIVE);
|
||||
}
|
||||
if (intr_stat & I2C_IC_INTR_STAT_R_RD_REQ_BITS) {
|
||||
hw->clr_rd_req;
|
||||
slave->transfer_in_progress = true;
|
||||
slave->handler(i2c, I2C_SLAVE_REQUEST);
|
||||
}
|
||||
}
|
||||
|
||||
static void __not_in_flash_func(i2c0_slave_irq_handler)() {
|
||||
i2c_slave_irq_handler(&i2c_slaves[0]);
|
||||
}
|
||||
|
||||
static void __not_in_flash_func(i2c1_slave_irq_handler)() {
|
||||
i2c_slave_irq_handler(&i2c_slaves[1]);
|
||||
}
|
||||
|
||||
void i2c_slave_init(i2c_inst_t *i2c, uint8_t address, i2c_slave_handler_t handler) {
|
||||
assert(i2c == i2c0 || i2c == i2c1);
|
||||
assert(handler != NULL);
|
||||
|
||||
uint i2c_index = i2c_hw_index(i2c);
|
||||
i2c_slave_t *slave = &i2c_slaves[i2c_index];
|
||||
slave->i2c = i2c;
|
||||
slave->handler = handler;
|
||||
|
||||
// Note: The I2C slave does clock stretching implicitly after a RD_REQ, while the Tx FIFO is empty.
|
||||
// There is also an option to enable clock stretching while the Rx FIFO is full, but we leave it
|
||||
// disabled since the Rx FIFO should never fill up (unless slave->handler() is way too slow).
|
||||
i2c_set_slave_mode(i2c, true, address);
|
||||
|
||||
i2c_hw_t *hw = i2c_get_hw(i2c);
|
||||
// unmask necessary interrupts
|
||||
hw->intr_mask = I2C_IC_INTR_MASK_M_RX_FULL_BITS | I2C_IC_INTR_MASK_M_RD_REQ_BITS | I2C_IC_RAW_INTR_STAT_TX_ABRT_BITS | I2C_IC_INTR_MASK_M_STOP_DET_BITS | I2C_IC_INTR_MASK_M_START_DET_BITS;
|
||||
|
||||
// enable interrupt for current core
|
||||
uint num = I2C0_IRQ + i2c_index;
|
||||
irq_set_exclusive_handler(num, i2c_index == 0 ? i2c0_slave_irq_handler : i2c1_slave_irq_handler);
|
||||
irq_set_enabled(num, true);
|
||||
}
|
||||
|
||||
void i2c_slave_deinit(i2c_inst_t *i2c) {
|
||||
assert(i2c == i2c0 || i2c == i2c1);
|
||||
|
||||
uint i2c_index = i2c_hw_index(i2c);
|
||||
i2c_slave_t *slave = &i2c_slaves[i2c_index];
|
||||
assert(slave->i2c == i2c); // should be called after i2c_slave_init()
|
||||
|
||||
slave->i2c = NULL;
|
||||
slave->handler = NULL;
|
||||
slave->transfer_in_progress = false;
|
||||
|
||||
uint num = I2C0_IRQ + i2c_index;
|
||||
irq_set_enabled(num, false);
|
||||
irq_remove_handler(num, i2c_index == 0 ? i2c0_slave_irq_handler : i2c1_slave_irq_handler);
|
||||
|
||||
i2c_hw_t *hw = i2c_get_hw(i2c);
|
||||
hw->intr_mask = I2C_IC_INTR_MASK_RESET;
|
||||
|
||||
i2c_set_slave_mode(i2c, false, 0);
|
||||
}
|
66
i2c_slave.h
Normal file
66
i2c_slave.h
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Valentin Milea <valentin.milea@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
#ifndef _I2C_SLAVE_H_
|
||||
#define _I2C_SLAVE_H_
|
||||
|
||||
#include <hardware/i2c.h>
|
||||
#include <pico/stdlib.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \file i2c_slave.h
|
||||
*
|
||||
* \brief I2C slave setup.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief I2C slave event types.
|
||||
*/
|
||||
typedef enum i2c_slave_event_t
|
||||
{
|
||||
I2C_SLAVE_RECEIVE, /**< Data from master is available for reading. Slave must read from Rx FIFO. */
|
||||
I2C_SLAVE_REQUEST, /**< Master is requesting data. Slave must write into Tx FIFO. */
|
||||
I2C_SLAVE_FINISH, /**< Master has sent a Stop or Restart signal. Slave may prepare for the next transfer. */
|
||||
} i2c_slave_event_t;
|
||||
|
||||
/**
|
||||
* \brief I2C slave event handler
|
||||
*
|
||||
* The event handler will run from the I2C ISR, so it should return quickly (under 25 us at 400 kb/s).
|
||||
* Avoid blocking inside the handler and split large data transfers across multiple calls for best results.
|
||||
* When sending data to master, up to `i2c_get_write_available()` bytes can be written without blocking.
|
||||
* When receiving data from master, up to `i2c_get_read_available()` bytes can be read without blocking.
|
||||
*
|
||||
* \param i2c Slave I2C instance.
|
||||
* \param event Event type.
|
||||
*/
|
||||
typedef void (*i2c_slave_handler_t)(i2c_inst_t *i2c, i2c_slave_event_t event);
|
||||
|
||||
/**
|
||||
* \brief Configure I2C instance for slave mode.
|
||||
*
|
||||
* \param i2c I2C instance.
|
||||
* \param address 7-bit slave address.
|
||||
* \param handler Called on events from I2C master. It will run from the I2C ISR, on the CPU core
|
||||
* where the slave was initialized.
|
||||
*/
|
||||
void i2c_slave_init(i2c_inst_t *i2c, uint8_t address, i2c_slave_handler_t handler);
|
||||
|
||||
/**
|
||||
* \brief Restore I2C instance to master mode.
|
||||
*
|
||||
* \param i2c I2C instance.
|
||||
*/
|
||||
void i2c_slave_deinit(i2c_inst_t *i2c);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _I2C_SLAVE_H_
|
32
main.c
32
main.c
@ -3,6 +3,7 @@
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#include "communication.h"
|
||||
#include "pico/stdlib.h"
|
||||
#include "hardware/pwm.h"
|
||||
#include <stdio.h>
|
||||
@ -11,6 +12,15 @@
|
||||
#define PIN_VITESSE_M1 2
|
||||
#define PIN_SENS_A_M1 0
|
||||
#define PIN_SENS_B_M1 1
|
||||
|
||||
// Juste pour information - les broches sont re-définies dans i2c_slave
|
||||
#define I2C0_SDA_PIN 16
|
||||
#define I2C0_SCL_PIN 17
|
||||
|
||||
// Juste pour information - les broches sont re-définies dans i2c_master
|
||||
#define I2C1_SDA_PIN 18
|
||||
#define I2C1_SCL_PIN 19
|
||||
|
||||
int M1_INITIALISE()
|
||||
{
|
||||
gpio_init(PIN_VITESSE_M1);
|
||||
@ -53,8 +63,10 @@ int M1_RECULE()
|
||||
|
||||
void main()
|
||||
{
|
||||
char message [256];
|
||||
stdio_init_all();
|
||||
|
||||
|
||||
// CLignottement LED
|
||||
gpio_set_function(LED_VERTE, GPIO_FUNC_PWM);
|
||||
pwm_set_wrap(4, 100);
|
||||
@ -64,6 +76,26 @@ void main()
|
||||
//Moteur 1
|
||||
|
||||
M1_INITIALISE();
|
||||
|
||||
// Exemple de communication entre 2 Rpi Pico
|
||||
/*while(1){
|
||||
|
||||
printf("Envoi message\n");
|
||||
communication_envoyer_message("Bonjour !\n", 11);
|
||||
|
||||
printf("Lire message\n");
|
||||
if (communication_lire_message(message) == I2C_ECHEC){
|
||||
printf("Echec de la lecture du message\n");
|
||||
}else{
|
||||
printf("Succes\n");
|
||||
printf("%s",message);
|
||||
}
|
||||
|
||||
sleep_ms(1000);
|
||||
}*/
|
||||
|
||||
|
||||
|
||||
while(1)
|
||||
{
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user