213 lines
6.1 KiB
C
213 lines
6.1 KiB
C
#include <stdio.h>
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#include "spi_nb.h"
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#include "hardware/gpio.h"
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#include "hardware/structs/spi.h"
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#include "hardware/spi.h"
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#include "hardware/irq.h"
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#include "hardware/regs/dreq.h"
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uint16_t spi0_slave_register;
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uint8_t* spi0_buffer;
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uint8_t spi0_nb_data_to_read;
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#define PIN_CS 1
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void cs_select(void) {
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asm volatile("nop \n nop \n nop");
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gpio_put(PIN_CS, 0); // Active low
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asm volatile("nop \n nop \n nop");
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}
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void cs_deselect(void) {
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asm volatile("nop \n nop \n nop");
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gpio_put(PIN_CS, 1);
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asm volatile("nop \n nop \n nop");
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}
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int spi_nb_read_register_8bits(spi_inst_t * spi, uint16_t spi_slave_register, uint8_t *buffer, uint8_t nb_data_to_read){
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uint16_t dummy_buffer[8]={0, 0, 0, 0,0, 0, 0, 0};
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uint8_t nb_data_read;
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static enum {
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INIT,
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WAIT_SPI_IDLE,
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SEND_REGISTER_ADRESS,
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WAIT_SENDING_DATA,
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SEND_DUMMY_DATA,
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WAIT_RECIEVING_DATA,
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READ_DATA,
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SPI_IN_ERROR,
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}status=INIT;
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switch(status){
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case INIT:
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if(spi == spi0){
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spi0_slave_register = spi_slave_register;
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spi0_buffer = buffer;
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spi0_nb_data_to_read = nb_data_to_read;
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}
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cs_select();
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case WAIT_SPI_IDLE:
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if(spi_nb_busy(spi) == SPI_IDLE){
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status = SEND_REGISTER_ADRESS;
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//puts("SEND_REGISTER_ADRESS");
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}
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break;
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case SEND_REGISTER_ADRESS:
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spi_slave_register = spi_slave_register | 0x80 | 0X40;
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if(spi_nb_write_data(spi, &spi_slave_register, 1) == SPI_OK){
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status = WAIT_SENDING_DATA;
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// Ici on veut tester une interruption
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// Armement de l'interruption
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//puts("WAIT_SENDING_DATA");
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}else{
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status = SPI_IN_ERROR;
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}
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break;
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case WAIT_SENDING_DATA:
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if(!spi_nb_busy(spi)){
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spi_nb_flush_recieve_fifo(spi);
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status = SEND_DUMMY_DATA;
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//puts("SEND_DUMMY_DATA");
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}
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break;
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case SEND_DUMMY_DATA:
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if(spi_nb_write_data(spi, dummy_buffer, nb_data_to_read) == SPI_OK){
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status = WAIT_RECIEVING_DATA;
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//puts("WAIT_RECIEVING_DATA");
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}else{
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status = SPI_IN_ERROR;
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}
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break;
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case WAIT_RECIEVING_DATA:
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if(!spi_nb_busy(spi)){
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status = READ_DATA;
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//puts("READ_DATA");
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}
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break;
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case READ_DATA:
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cs_deselect();
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nb_data_read = spi_nb_read_data_8bits(spi, buffer);
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if(nb_data_read == nb_data_to_read){
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//puts("SPI_SUCCESS");
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status = INIT;
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return SPI_SUCCESS;
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}
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//puts("SPI_FAILED");
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status = SPI_IN_ERROR;
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return SPI_FAILED;
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break;
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case SPI_IN_ERROR:
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//puts("SPI_IN_ERROR");
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spi_nb_flush_recieve_fifo(spi);
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cs_deselect();
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status = INIT;
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return SPI_FAILED;
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break;
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}
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return SPI_IN_PROGRESS;
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}
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/// @brief Tell if the SPI is busy
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/// @param spi SPI device to use (spi0 or spi1)
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/// @return SPI_BUSY of SPI_IDLE
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int spi_nb_busy(spi_inst_t * spi){
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return (spi_get_hw(spi)->sr & SPI_SSPSR_BSY_BITS);
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}
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/// @brief Empty SPI Recieve FIFO
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/// @param spi SPI device to use (spi0 or spi1)
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void spi_nb_flush_recieve_fifo(spi_inst_t * spi){
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uint16_t dummy;
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while(spi_get_hw(spi)->sr & SPI_SSPSR_RNE_BITS){
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dummy = spi_get_hw(spi)->dr;
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}
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}
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/// @brief read the SPI Recieve FIFO
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/// @param spi SPI device to use (spi0 or spi1)
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/// @param buffer To store data recieved
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/// @return Number of byte read
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uint8_t spi_nb_read_data_8bits(spi_inst_t * spi, uint8_t * buffer){
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uint8_t index = 0;
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while(spi_get_hw(spi)->sr & SPI_SSPSR_RNE_BITS){
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buffer[index] = (uint8_t)spi_get_hw(spi)->dr ;//& SPI_SSPDR_DATA_BITS;
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index++;
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}
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return index;
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}
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/// @brief Write severals byte to the SPI Transmit FIFO
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/// @param spi SPI device to use (spi0 or spi1)
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/// @param buffer data to transmit
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/// @param size size of the data to transmit
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/// @return SPI_OK or SPI_ERR_TRANSMIT_FIFO_FULL
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inline int spi_nb_write_data(spi_inst_t * spi, uint16_t * buffer, uint8_t size){
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int statu_spi = SPI_OK;
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uint8_t index=0;
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do
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{
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if(spi_get_hw(spi)->sr & SPI_SSPSR_TNF_BITS){
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spi_get_hw(spi)->dr = buffer[index];
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statu_spi = SPI_OK;
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}else{
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statu_spi = SPI_ERR_TRANSMIT_FIFO_FULL;
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}
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while (spi_is_busy(spi));
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//statu_spi = spi_nb_write_byte(spi, buffer[index]);
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//printf("envoi : %x\n", buffer[index]);
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//sleep_ms(1);
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index++;
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} while ( (statu_spi == SPI_OK) && (index < size));
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return statu_spi;
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}
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/// @brief Write one "byte", 4 to 16 bits to the SPI Transmit FIFO.
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/// @param spi
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/// @param data : Data to send
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/// @return SPI_OK if Ok, SPI_ERR_TRANSMIT_FIFO_FULL if fifo is full
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int spi_nb_write_byte(spi_inst_t * spi, uint16_t data){
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if(spi_get_hw(spi)->sr & SPI_SSPSR_TNF_BITS){
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spi_get_hw(spi)->dr = data;
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return SPI_OK;
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}
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return SPI_ERR_TRANSMIT_FIFO_FULL;
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}
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int spi_read_register(spi_inst_t * spi, uint16_t spi_slave_register, uint8_t *buffer, uint8_t nb_to_read){
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int statu;
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uint8_t nb_read;
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uint16_t tampon[15]={0,0,0,0,0,0,0,0,0,0,0,0};
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spi_slave_register = spi_slave_register | 0x80 | 0X40;
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tampon[0]= spi_slave_register;
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spi_nb_flush_recieve_fifo(spi0);
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cs_select();
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statu = spi_nb_write_data(spi, tampon, 1 + nb_to_read);
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if(statu == SPI_ERR_TRANSMIT_FIFO_FULL){
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printf("Erreur: spi_read_register: SPI_ERR_TRANSMIT_FIFO_FULL");
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return statu;
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}
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while(spi_nb_busy(spi0));
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cs_deselect();
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nb_read = spi_nb_read_data_8bits(spi0, buffer);
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if(nb_read != nb_to_read+1){
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printf("Erreur: spi_read_register, nb de valeurs lues incoherentes");
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}
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} |