166 lines
5.0 KiB
Plaintext
166 lines
5.0 KiB
Plaintext
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; Copyright (c) 2021 pmarques-dev @ github
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program quadrature_encoder
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; this code must be loaded into address 0, but at 29 instructions, it probably
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; wouldn't be able to share space with other programs anyway
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.origin 0
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; the code works by running a loop that continuously shifts the 2 phase pins into
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; ISR and looks at the lower 4 bits to do a computed jump to an instruction that
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; does the proper "do nothing" | "increment" | "decrement" action for that pin
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; state change (or no change)
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; ISR holds the last state of the 2 pins during most of the code. The Y register
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; keeps the current encoder count and is incremented / decremented according to
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; the steps sampled
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; writing any non zero value to the TX FIFO makes the state machine push the
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; current count to RX FIFO between 6 to 18 clocks afterwards. The worst case
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; sampling loop takes 14 cycles, so this program is able to read step rates up
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; to sysclk / 14 (e.g., sysclk 125MHz, max step rate = 8.9 Msteps/sec)
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; 00 state
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JMP update ; read 00
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JMP decrement ; read 01
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JMP increment ; read 10
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JMP update ; read 11
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; 01 state
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JMP increment ; read 00
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JMP update ; read 01
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JMP update ; read 10
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JMP decrement ; read 11
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; 10 state
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JMP decrement ; read 00
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JMP update ; read 01
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JMP update ; read 10
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JMP increment ; read 11
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; to reduce code size, the last 2 states are implemented in place and become the
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; target for the other jumps
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; 11 state
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JMP update ; read 00
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JMP increment ; read 01
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decrement:
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; note: the target of this instruction must be the next address, so that
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; the effect of the instruction does not depend on the value of Y. The
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; same is true for the "JMP X--" below. Basically "JMP Y--, <next addr>"
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; is just a pure "decrement Y" instruction, with no other side effects
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JMP Y--, update ; read 10
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; this is where the main loop starts
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.wrap_target
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update:
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; we start by checking the TX FIFO to see if the main code is asking for
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; the current count after the PULL noblock, OSR will have either 0 if
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; there was nothing or the value that was there
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SET X, 0
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PULL noblock
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; since there are not many free registers, and PULL is done into OSR, we
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; have to do some juggling to avoid losing the state information and
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; still place the values where we need them
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MOV X, OSR
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MOV OSR, ISR
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; the main code did not ask for the count, so just go to "sample_pins"
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JMP !X, sample_pins
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; if it did ask for the count, then we push it
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MOV ISR, Y ; we trash ISR, but we already have a copy in OSR
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PUSH
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sample_pins:
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; we shift into ISR the last state of the 2 input pins (now in OSR) and
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; the new state of the 2 pins, thus producing the 4 bit target for the
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; computed jump into the correct action for this state
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MOV ISR, NULL
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IN OSR, 2
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IN PINS, 2
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MOV PC, ISR
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; the PIO does not have a increment instruction, so to do that we do a
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; negate, decrement, negate sequence
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increment:
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MOV X, !Y
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JMP X--, increment_cont
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increment_cont:
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MOV Y, !X
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.wrap ; the .wrap here avoids one jump instruction and saves a cycle too
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% c-sdk {
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#include "hardware/clocks.h"
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#include "hardware/gpio.h"
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// max_step_rate is used to lower the clock of the state machine to save power
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// if the application doesn't require a very high sampling rate. Passing zero
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// will set the clock to the maximum, which gives a max step rate of around
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// 8.9 Msteps/sec at 125MHz
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static inline void quadrature_encoder_program_init(PIO pio, uint sm, uint offset, uint pin, int max_step_rate)
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{
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 2, false);
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gpio_pull_up(pin);
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gpio_pull_up(pin + 1);
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pio_sm_config c = quadrature_encoder_program_get_default_config(offset);
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sm_config_set_in_pins(&c, pin); // for WAIT, IN
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sm_config_set_jmp_pin(&c, pin); // for JMP
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// shift to left, autopull disabled
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sm_config_set_in_shift(&c, false, false, 32);
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// don't join FIFO's
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_NONE);
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// passing "0" as the sample frequency,
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if (max_step_rate == 0) {
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sm_config_set_clkdiv(&c, 1.0);
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} else {
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// one state machine loop takes at most 14 cycles
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float div = (float)clock_get_hz(clk_sys) / (14 * max_step_rate);
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sm_config_set_clkdiv(&c, div);
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}
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pio_sm_init(pio, sm, offset, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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// When requesting the current count we may have to wait a few cycles (average
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// ~11 sysclk cycles) for the state machine to reply. If we are reading multiple
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// encoders, we may request them all in one go and then fetch them all, thus
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// avoiding doing the wait multiple times. If we are reading just one encoder,
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// we can use the "get_count" function to request and wait
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static inline void quadrature_encoder_request_count(PIO pio, uint sm)
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{
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pio->txf[sm] = 1;
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}
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static inline int32_t quadrature_encoder_fetch_count(PIO pio, uint sm)
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{
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while (pio_sm_is_rx_fifo_empty(pio, sm))
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tight_loop_contents();
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return pio->rxf[sm];
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}
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static inline int32_t quadrature_encoder_get_count(PIO pio, uint sm)
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{
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quadrature_encoder_request_count(pio, sm);
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return quadrature_encoder_fetch_count(pio, sm);
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}
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%}
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